1. Field of the Invention
The present invention relates to an active inductance circuit having transistors and a capacitor and operating as an inductance and to a differential amplifier circuit having the circuit.
2. Description of the Related Art
Inductances have been widely used with the object of extending an amplification band and compensating transmission characteristics in high-speed communication circuits. However, an inductance located in a chip fabricated by using wiring layers requires a large surface area even in the case of a small inductance value. As a result, cost is raised due to increase in the chip size, and logic that can be carried on the chip is decreased. To overcome this problem, active inductance circuits in which active elements such as transistors and passive elements such as capacitors are combined to have characteristics equivalent to an inductance have been suggested
An example of such an active inductance circuit is disclosed in Japanese Unexamined Patent Application Publication No. 2001-251164. FIG. 11 shows a configuration of the active inductance circuit. This circuit has a first differential circuit, a differential integrator, and a second differential pair. In the first differential circuit, input signal voltage terminals Vi are taken to be between the gate terminals of MOS transistors 41a and 41b. The differential integrator is constituted by MOS transistors 40a and 40b in which a capacitor 43 is connected between the drain terminals and each of those drain terminals is connected to each of the source terminals of the MOS transistors 41a and 41b. Further, the differential integrator has a third differential pair in which drains serve as output signal voltage terminals.
Further, in the differential integrator, the gate terminals of MOS transistors 40a and 40b are connected to drain terminals of MOS transistors 40b and 40a, respectively. The source terminals of MOS transistors 40a and 40b are commonly connected and grounded via a first current source 45. The second differential pair is composed of MOS transistors 42a and 42b in which the gate terminals are connected to drain terminals of MOS transistors 40a and 40b constituting the third differential pair and the drain terminals are connected to input signal voltage terminals.
In this conventional example, the impedance (Zin), as viewed from the input terminals, is represented byZin=Vin/Iin=sC/(gm*gm)and is equivalent to an inductance, as viewed from the input terminals. In this conventional example, the active inductance is constituted by three MOS transistors per one differential channel, that is, a total of six transistors.
As mentioned hereinabove, the conventional active inductance requires a total of six elements for a differential circuit. Thus, in high-frequency applications, parasitic capacitances of three MOS in each channel of the differential circuit are generated, thereby degrading the high-frequency characteristic. Furthermore, when an amplification circuit is composed by employing this active inductance as a load, because a bias current flows from Vi in the input direction, drain terminals of a differential pair composed of PMOS have to be connected to the input terminal Vi.
In this case, the gate-source voltage of MOS transistors 41a and 41b, the gate-source voltage of MOS transistors 40a and 40b, and the voltage drop component of the current source 45 are added to the voltage drop of the conventional active inductance used as a load, even when the lowest values are assumed. As a result, the voltage drop in the conventional active inductance is large, and thus it is difficult to make a transition to low-voltage operation when an amplifier is composed by using such a conventional example.